Development of a synchronous sequential logic iLab

dc.contributor.author Mwikirize, Cosmas Byotariho
dc.date.accessioned 2013-12-11T07:33:34Z
dc.date.available 2013-12-11T07:33:34Z
dc.date.issued 2012-06
dc.description A thesis submitted in partial fulfillment of the requirements for the award of the Masters of Science Degree in Electrical Engineering of Makerere University en_US
dc.description.abstract Initially developed at Massachusetts Institute of Technology (MIT), online laboratories have been utilized globally to support science and engineering curricula. Having utilized online laboratories since 2005, Makerere University, one of the collaborating institutions on the iLab-Africa project still lacked a bespoke laboratory for sequential logic digital circuits. In addition, no such laboratory existed elsewhere. This research was thus undertaken to address the need for a sequential logic laboratory that supports digital electronics curricula at Makerere University. The research involved review of curricula and subsequent benchmarking of the functional and non-functional requirements for the laboratory. This information was used to derive the hardware designs for the experiments using the Multisim design suite. Thereafter, physical implementation of the laboratory was undertaken on the Educational Laboratory Virtual Instrumentation Suite (ELVIS) hardware, and the user interface was developed using the Laboratory Virtual Instrument Engineering Workbench (LabVIEW). The working virtual instruments for the laboratory were then integrated into the interactive iLabs Shared Architecture (ISA), a generic web infrastructure for development and deployment of online laboratories. With the synchronous sequential laboratory in place, students and researchers at MAK and globally now have a unique laboratory platform for experimentation in the in the fields of counters, shift registers and clock signal analysis. en_US
dc.identifier.citation Mwikirize, C.B. (2012). Development of a synchronous sequential logic iLab. Unpublished master's dissertation. Makerere University, Kampala, Uganda en_US
dc.identifier.uri http://hdl.handle.net/10570/2107
dc.language.iso en en_US
dc.publisher Makerere University en_US
dc.subject iLab en_US
dc.subject Sequential logic laboratory en_US
dc.subject Requirements en_US
dc.subject Development en_US
dc.subject Digital electronics en_US
dc.subject Curriculum en_US
dc.title Development of a synchronous sequential logic iLab en_US
dc.type Thesis en_US
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